Course: Electronics I (ES 230)
Spring, 2013
Instructor: Jack Ou, Ph.D.
Office Location: Salazar Hall 2010B
Telephone: (707) 664 3462
Email:jack.ou AT sonoma DOT edu
Office Hours: By appointment during during MW2:15-2:45 and TTH 12:00-12:30
Class Days/Time: MW 10:45-12:00
Classroom: Salazar Hall 2009A
Prerequisites: ES 220 and ES221
Co-requisites: ES 231
Student assistants: Joshua Disbrow (available Thursday from 12:30 to 1:00 PM) and Raphael Diaz.
Course Description
Theory, characteristics and operation of diodes, bipolar junction transistors and MOSFET transistors; analog and digital electronic circuits; design and analysis of analog electronic circuits such as filters, operational amplifiers,single and multistage amplifiers; modeling and simulation using spice/multisim software.
Required Text: Behzad Razavi, “Fundamentals of Microelectronics”, Wiley, 1st Edition.
(ISBN-13: 978-0-471-47846-1)
Date |
Topic |
Reference |
Content |
1/14 |
|||
1/16 |
2.1 |
basic device physics, hot-point probe test, thermoelectric generator |
|
| 1/22 | 2.2-2.3 | physics of PN junction diode | |
| 1/24 | Applications of PN junction | 2.2-2.3 | Energy band diagram, Photoresistor, solar cell, LED, photodiode. |
1/29 |
Quiz 1, diode model |
3.1-3.3 |
diode models, diode logic |
1/31 |
3.4-3.5 |
small signal analysis, diode logic |
|
2/5 |
half-wave/full-wave rectifier circuit |
||
2/7 |
regulator, LM337, LM117 |
||
2/12 |
voltage doubler, diode mixer, level shifter |
||
2/14 |
4.1-4.3 |
Physics of Bipolar Junction Transistor, review sheet |
|
2/19 |
charge control theory, history of semiconductor industry |
||
2/21 |
Test #1 |
||
2/25 |
4.5 |
BJT in Saturation, RTL, DTL, TTL |
|
| 2/28 | small signal model, pnp | 4.4-4.6 | transconductance, early effect, input/output resistance, pnp transistor |
3/5 |
small signal model, pnp | 4.4-4.6 | |
3/7 |
5.1-5.2 |
base bias, emitter degeneration, iteration using matlab script |
|
3/12 |
5.3.1 |
||
3/14 |
CE |
||
Spring break |
|||
3//26 |
CE |
||
3/28 |
5.3.2 |
||
4/2 |
CC |
5.3.3 |
|
4/4 |
13.1-13.4 |
||
4/9 |
output stage |
13.4-13.5 |
|
| 4/11 | memorize the formulas |
||
| 4/16 | Test #2
|
||
4/18 |
6.1-6.2 |
Overview of Digital IC Design from 4:30 to 5:30 pm. |
|
4/23 |
6.1-2, 15.1-2 |
Device Physics |
|
4/25 |
NMOS |
NMOS Inverter, Device Physics |
|
4/30 |
ALD1106/07, CMOS NAND2 | 6.1-2, 15.1-15.4 | ALD 1106/07, PMOS, CMOS inverter, NAND2 |
5/2 |
Application of CMOS transistors in Digital Integrated Circuits, Resubmit Test #2 |
Transistor Implementation of a 4-bit adder, SimVision, Verilog |
|
5/7 |
final exam |
11 a.m. -12:50 |
|